\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.749 MHz |
53.337 |
321.663 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt0_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt0_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
\FracN:MODULE_8:g1:a0:s_2\/cpt0_1 |
2.914 |
macrocell20 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cpt0_1 |
\FracN:MODULE_8:g1:a0:s_2\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cout |
\FracN:MODULE_8:g1:a0:s_3\/cin |
0.000 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cin |
\FracN:MODULE_8:g1:a0:s_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.749 MHz |
53.337 |
321.663 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt0_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt0_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
\FracN:MODULE_8:g1:a0:s_2\/cpt1_1 |
2.914 |
macrocell20 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cpt1_1 |
\FracN:MODULE_8:g1:a0:s_2\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cout |
\FracN:MODULE_8:g1:a0:s_3\/cin |
0.000 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cin |
\FracN:MODULE_8:g1:a0:s_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.749 MHz |
53.337 |
321.663 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt0_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt0_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
\FracN:MODULE_8:g1:a0:s_2\/cpt0_1 |
2.914 |
macrocell20 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cpt0_1 |
\FracN:MODULE_8:g1:a0:s_2\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cout |
\FracN:MODULE_8:g1:a0:s_3\/cin |
0.000 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cin |
\FracN:MODULE_8:g1:a0:s_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.749 MHz |
53.337 |
321.663 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt0_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt0_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
\FracN:MODULE_8:g1:a0:s_2\/cpt1_1 |
2.914 |
macrocell20 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cpt1_1 |
\FracN:MODULE_8:g1:a0:s_2\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cout |
\FracN:MODULE_8:g1:a0:s_3\/cin |
0.000 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cin |
\FracN:MODULE_8:g1:a0:s_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.749 MHz |
53.337 |
321.663 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt1_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt1_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
\FracN:MODULE_8:g1:a0:s_2\/cpt0_1 |
2.914 |
macrocell20 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cpt0_1 |
\FracN:MODULE_8:g1:a0:s_2\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cout |
\FracN:MODULE_8:g1:a0:s_3\/cin |
0.000 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cin |
\FracN:MODULE_8:g1:a0:s_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.749 MHz |
53.337 |
321.663 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt1_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt1_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
\FracN:MODULE_8:g1:a0:s_2\/cpt1_1 |
2.914 |
macrocell20 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cpt1_1 |
\FracN:MODULE_8:g1:a0:s_2\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cout |
\FracN:MODULE_8:g1:a0:s_3\/cin |
0.000 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cin |
\FracN:MODULE_8:g1:a0:s_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.749 MHz |
53.337 |
321.663 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt1_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt1_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
\FracN:MODULE_8:g1:a0:s_2\/cpt0_1 |
2.914 |
macrocell20 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cpt0_1 |
\FracN:MODULE_8:g1:a0:s_2\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cout |
\FracN:MODULE_8:g1:a0:s_3\/cin |
0.000 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cin |
\FracN:MODULE_8:g1:a0:s_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.749 MHz |
53.337 |
321.663 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt1_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt1_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/q_fixed |
\FracN:MODULE_8:g1:a0:s_2\/cpt1_1 |
2.914 |
macrocell20 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cpt1_1 |
\FracN:MODULE_8:g1:a0:s_2\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_8:g1:a0:s_2\/cout |
\FracN:MODULE_8:g1:a0:s_3\/cin |
0.000 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cin |
\FracN:MODULE_8:g1:a0:s_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.750 MHz |
53.334 |
321.666 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt1_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt1_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt0_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cout |
\FracN:MODULE_7:g1:a0:s_3\/cin |
0.000 |
macrocell14 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_3\ |
\FracN:MODULE_7:g1:a0:s_3\/cin |
\FracN:MODULE_7:g1:a0:s_3\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_3\ |
\FracN:MODULE_7:g1:a0:s_3\/q_fixed |
\FracN:MODULE_8:g1:a0:s_3\/cpt0_1 |
2.911 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cpt0_1 |
\FracN:MODULE_8:g1:a0:s_3\/cout |
3.830 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|
\FracN:acc1_0\/q |
\FracN:MODULE_8:g1:a0:s_6\/cin |
18.750 MHz |
53.334 |
321.666 |
|
Type |
Location |
Fanout |
Instance/Net |
Source |
Dest |
Delay (ns) |
macrocell25 |
U(1,4) |
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/clock_0 |
\FracN:acc1_0\/q |
1.250 |
Route |
|
1 |
\FracN:acc1_0\ |
\FracN:acc1_0\/q |
\FracN:adder1_0\/cpt1_1 |
6.530 |
macrocell53 |
U(2,4) |
1 |
\FracN:adder1_0\ |
\FracN:adder1_0\/cpt1_1 |
\FracN:adder1_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:adder1_0\/cout |
\FracN:adder1_1\/cin |
0.000 |
macrocell59 |
U(2,4) |
1 |
\FracN:adder1_1\ |
\FracN:adder1_1\/cin |
\FracN:adder1_1\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:adder1_1\/cout |
\FracN:adder1_2\/cin |
0.000 |
macrocell60 |
U(2,4) |
1 |
\FracN:adder1_2\ |
\FracN:adder1_2\/cin |
\FracN:adder1_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:adder1_2\/cout |
\FracN:adder1_3\/cin |
0.000 |
macrocell61 |
U(2,4) |
1 |
\FracN:adder1_3\ |
\FracN:adder1_3\/cin |
\FracN:adder1_3\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:adder1_3\/cout |
\FracN:adder1_4\/cin |
0.000 |
macrocell62 |
U(2,3) |
1 |
\FracN:adder1_4\ |
\FracN:adder1_4\/cin |
\FracN:adder1_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:adder1_4\/cout |
\FracN:adder1_5\/cin |
0.000 |
macrocell63 |
U(2,3) |
1 |
\FracN:adder1_5\ |
\FracN:adder1_5\/cin |
\FracN:adder1_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:adder1_5\/cout |
\FracN:adder1_6\/cin |
0.000 |
macrocell64 |
U(2,3) |
1 |
\FracN:adder1_6\ |
\FracN:adder1_6\/cin |
\FracN:adder1_6\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_6\ |
\FracN:adder1_6\/cout |
\FracN:adder1_7\/cin |
0.000 |
macrocell65 |
U(2,3) |
1 |
\FracN:adder1_7\ |
\FracN:adder1_7\/cin |
\FracN:adder1_7\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_7\ |
\FracN:adder1_7\/cout |
\FracN:adder1_8\/cin |
0.000 |
macrocell66 |
U(2,3) |
1 |
\FracN:adder1_8\ |
\FracN:adder1_8\/cin |
\FracN:adder1_8\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_8\ |
\FracN:adder1_8\/cout |
\FracN:adder1_9\/cin |
0.000 |
macrocell67 |
U(2,3) |
1 |
\FracN:adder1_9\ |
\FracN:adder1_9\/cin |
\FracN:adder1_9\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_9\ |
\FracN:adder1_9\/cout |
\FracN:adder1_10\/cin |
0.000 |
macrocell54 |
U(2,3) |
1 |
\FracN:adder1_10\ |
\FracN:adder1_10\/cin |
\FracN:adder1_10\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_10\ |
\FracN:adder1_10\/cout |
\FracN:adder1_11\/cin |
0.000 |
macrocell55 |
U(2,3) |
1 |
\FracN:adder1_11\ |
\FracN:adder1_11\/cin |
\FracN:adder1_11\/cout |
1.130 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_11\ |
\FracN:adder1_11\/cout |
\FracN:adder1_12\/cin |
0.000 |
macrocell56 |
U(3,3) |
1 |
\FracN:adder1_12\ |
\FracN:adder1_12\/cin |
\FracN:adder1_12\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_12\ |
\FracN:adder1_12\/cout |
\FracN:adder1_13\/cin |
0.000 |
macrocell57 |
U(3,3) |
1 |
\FracN:adder1_13\ |
\FracN:adder1_13\/cin |
\FracN:adder1_13\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_4:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_13\ |
\FracN:adder1_13\/cout |
\FracN:adder1_14\/cin |
0.000 |
macrocell58 |
U(3,3) |
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/cin |
\FracN:adder1_14\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:adder1_14\ |
\FracN:adder1_14\/q_fixed |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
2.911 |
macrocell4 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cpt1_0 |
\FracN:MODULE_6:g1:a0:s_0\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_0\ |
\FracN:MODULE_6:g1:a0:s_0\/cout |
\FracN:MODULE_6:g1:a0:s_1\/cin |
0.000 |
macrocell5 |
U(3,2) |
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/cin |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_6:g1:a0:s_1\ |
\FracN:MODULE_6:g1:a0:s_1\/q_fixed |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
3.662 |
macrocell12 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cpt1_0 |
\FracN:MODULE_7:g1:a0:s_1\/cout |
3.500 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_1\ |
\FracN:MODULE_7:g1:a0:s_1\/cout |
\FracN:MODULE_7:g1:a0:s_2\/cin |
0.000 |
macrocell13 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cin |
\FracN:MODULE_7:g1:a0:s_2\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_2\ |
\FracN:MODULE_7:g1:a0:s_2\/cout |
\FracN:MODULE_7:g1:a0:s_3\/cin |
0.000 |
macrocell14 |
U(3,4) |
1 |
\FracN:MODULE_7:g1:a0:s_3\ |
\FracN:MODULE_7:g1:a0:s_3\/cin |
\FracN:MODULE_7:g1:a0:s_3\/q_fixed |
2.030 |
Route |
|
1 |
\FracN:MODULE_7:g1:a0:s_3\ |
\FracN:MODULE_7:g1:a0:s_3\/q_fixed |
\FracN:MODULE_8:g1:a0:s_3\/cpt0_1 |
2.911 |
macrocell21 |
U(3,5) |
1 |
\FracN:MODULE_8:g1:a0:s_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cpt0_1 |
\FracN:MODULE_8:g1:a0:s_3\/cout |
3.830 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_3\ |
\FracN:MODULE_8:g1:a0:s_3\/cout |
\FracN:MODULE_8:g1:a0:s_4\/cin |
0.000 |
macrocell22 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cin |
\FracN:MODULE_8:g1:a0:s_4\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_4\ |
\FracN:MODULE_8:g1:a0:s_4\/cout |
\FracN:MODULE_8:g1:a0:s_5\/cin |
0.000 |
macrocell23 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cin |
\FracN:MODULE_8:g1:a0:s_5\/cout |
0.800 |
Route |
|
1 |
\FracN:MODULE_8:g1:a0:g0:u0:gof:g_arith(0):ga:cadd_5\ |
\FracN:MODULE_8:g1:a0:s_5\/cout |
\FracN:MODULE_8:g1:a0:s_6\/cin |
0.000 |
macrocell24 |
U(3,4) |
1 |
\FracN:MODULE_8:g1:a0:s_6\ |
|
SETUP |
2.190 |
Clock |
|
|
|
|
Skew |
0.000 |
|